Anatomy and Physiology of a Scalable Neuromorphic Chip That Learns
Narayan Srinivasa, Ph.D.
We will provide an overview of a state-of-the art low power and compact neuromorphic chip inspired by the brain. HRL has designed and fabricated this chip and associated software tools under the DARPA SyNAPSE program. We will describe the hardware (anatomy) design and features on this chip. We will also describe the software and examples of learning models (physiology) that can be implemented on this chip. Finally, we will provide a possible path to scaling such a chip for large scale autonomous applications in the future.